Overview

CPU-RTOS is an end-to-end software/hardware stack where I designed everything from the custom CPU's RTL to the compiler and software that runs on it. At the core of my design philosophy was simplicity-- I made everything as minimal as possible in order to run a diverse range of applications.

The system consists of a modified RISC-V CPU programming in Verilog, a Verilator/Cocotb simulation environment, a custom Python compiler for a simplified C-like language and a lightweight ROTS/development tools written in C- and assembly. Together, these tools allow the development of a wide range of programs. Examples of programs I have gotten to work include small games, schedulers and more.

CPU Design

I developed the RTL for a custom modified 32-bit CPU in Verilog. The CPU supports a simplified RISC-V architecture, containing the minimum amount of instructions to make writing my compiler and programming it not too tedious and feasible. I omitted many not necessary RISC-V instructions to make the scope of the project not too big and to have time to focus on writing software, at the expense of some performance.

A major part of the CPU is interrupt support. It supports up to 8 interrupt capable external devices that must be connected to dedicated interrupt signals. Upon interrupt, the CPU saves the required state and jumps to a specified point in software allowing for interactive applications.

The processor was developed and tested using Verilator and Cocotb. I wrote test suits for each individual model, as well as a main simulation environment that includes an interactive display and inputs that feed into the CPU.

Custom Compiler

Since the CPU does not implement the entire RISC-V ISA tradition compilers such as GCC would not work and I needed to make my own compiler to make it programmable in anything but assembly. I custom compiler is written in Python and compilers from a simplified C-like language (C-) down into my custom ISA.

The compiler includes five stages. It firsts lexes the program into tokens, then parses the tokens using a recursive descent algorithm to create and abstract syntax tree (AST). The majority of the code handles assembly generation which involves converting the AST into their corresponding assembly routines. This was by far the hardest part and was where the majority of the time in this project was spent. The fourth stage is linking which involves evaluating branching addresses, combining all source files into one and removing dead code. Finally the code is assembled into my ISA's custom encodings that is understandable by the CPU.

As of now, the compiler supports loops, conditional statements, int/char/pointer data types, structs and functions. In the future I plan to implement more important C constructs such as pointers.

RTOS and Software Stack

I developed a custom software stack in a mix of assembly and C- to provide developers useful tools for writing programs on my CPU.

Key components include:

• Interrupt Handling: Provides a C- Interrupt Service Routing (ISR) to make dealing with interrupts out of assembly possible.
• Scheduling: A simple Round Robin scheduler to run tasks concurrently.
• Math Libraries: A variety of efficient math functions implemented in assembly.
• IO Abstractions: Display support and other useful IO functions such as print().
• And more general system tools for interacting with the CPU.

View the project github for more information.